AI & software jobs in European defence and technology
Explore AI and software roles across defence, space and emerging technology employers, alongside openings at specialist AI companies. The collection covers both applied engineering and supporting roles within the sector.
Separate model research and training from software integration, data infrastructure and deployment. Check whether the work runs in the cloud, on embedded hardware or in a customer’s environment. The title alone does not establish the level of AI research involved; use the employer’s responsibilities and requirements to assess fit.
In this live collection
1354 vacancies · 83 employers
Most represented functions: Engineering (880) · Business development (89) · Research (84) · Production & operations (42)
As a Flight Software Team Lead, you’ll build and lead a new team developing flight software for ICEYE’s Optical Payload, enabling reliable, high-performance data collection from space that supports mission-critical Earth Observation and ISR capabilities. Who We Are ICEYE delivers space-based intelligence, surveillance, and reconnaissance (ISR) capabilities to governments and allied nations. This includes sovereign an
As a trusted partner for defense, intelligence, security, and maritime domain awareness, ICEYE’s near real-time data creates a tactical advantage for mission-critical operations. Designed for dual use, the platform also serves civil protection and commercial users for natural-catastrophe intelligence, insurance, maritime monitoring including oil-spill detection, and finance, contributing to global security and commun
Role highlights: Senior Test Automation Developer Location: Espoo, Finland Department: Release Engineering Reports to: Release Engineering Manager Employment type: Permanent Workplace model: Hybrid / Office Employment is subject to applicable security screening (incl. SUPO) Why this role matters: Testing and environment reliability are often the hidden tax on engineering velocity - slow feedback, flaky environments,
As a Senior DevOps Engineer, you’ll design and operate the core platform foundations that power ICEYE’s products, enabling secure, scalable, and reliable services across cloud and on-prem environments. Who We Are ICEYE delivers space-based intelligence, surveillance, and reconnaissance (ISR) capabilities to governments and allied nations. This includes sovereign and turnkey ISR missions leveraging ICEYE’s world-leadi
As a trusted partner for defense, intelligence, security, and maritime domain awareness, ICEYE's near real-time data creates a tactical advantage for mission-critical operations. Designed for dual use, the platform also serves civil protection and commercial users for natural-catastrophe intelligence, insurance, maritime monitoring (including oil-spill detection), and finance, contributing to global security and comm
As a trusted partner for defense, intelligence, security, and maritime domain awareness, ICEYE’s near real-time data creates a tactical advantage for mission-critical operations. Designed for dual use, the platform also serves civil protection and commercial users for natural-catastrophe intelligence, insurance, maritime monitoring (including oil-spill detection), and finance, contributing to global security and comm
As a Senior Software Engineer, you’ll help keep ICEYE’s world-leading SAR satellite constellation operating safely and reliably. Working in the AOCS domain, you will take technical ownership of Orbit Control software that helps ensure our satellites are exactly where they need to be to fulfil their mission. Your work will directly affect the performance, reliability, and quality of the SAR data ICEYE delivers to cust
We are looking for a Systems and Software Team Lead to own systems and software production and satellite-level testing for ICEYE's SAR satellites, from production integration through to proof that every onboard system performs reliably before a satellite ships. Your team is responsible for onboard software loading, validation, and checkout during production, and full satellite-level functional and end-to-end system c
In this role, you'll be the hands-on AI builder defense and intelligence customers rely on. You’ll deploy ICEYE’s intelligence platform into secure (often air-gapped) environments and rapidly ship AI-powered workflows on top of it—everything from Docker-based deployments to RAG systems fusing SAR imagery with intelligence reports. This is a ship-code-daily role: turning raw satellite data into mission-critical tools
Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off, with potential responsibility for full-chip execution. Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics. Perform power planning and analysis, addressing IR drop, electromigration, and low-power design techniques. Ensure design rule chec
Define and own the compute engine architecture specifications, balancing performance, flexibility, power, area, and design complexity. Lead architectural exploration from early concept through to specification, coordinating with modelling, implementation, verification, and physical design teams. Specify execution units, memory hierarchy, instruction sets and flow — making principled trade-offs at every level. Help bu
Fractile is building a full-stack AI accelerator from the ground up, and the compiler team sits at the heart of how we deliver performance. As the Engineering Manager for Compilers, you will build and lead a team of 10+ engineers developing the compiler stack for our novel AI acceleration hardware, with direct responsibility for enabling industry-leading LLM inference performance on Fractile's accelerators. This is a
We build the control chain that powers on, monitors, updates, and protects devices and racks across bare metal, RTOS, and embedded Linux. It’s production-critical software that keeps racks stable, updates safe, and hardware secure. It’s a critical layer in turning a tokens per second benchmark into a tokens per month system, turning great silicon into reliable output at rack scale. You’ll be there for the first racks
Develop and maintain ATE test programs for an AI accelerator chip targeting high-volume manufacturing. Implement manufacturing test content for advanced CMOS designs including high-speed logic, SRAM, DRAM, and high speed IO blocks. Develop and debug structural and functional test content such as scan/ATPG, LBIST, MBIST, JTAG, and HSIO tests. Bring up first silicon on ATE, including pattern debug, tester correlation,
We build the control chain that powers on, monitors, updates, and protects devices and racks across bare metal, RTOS, and embedded Linux. We also build the communication mechanisms that connect devices to each other and to the host. Security runs through all of it. A chain of trust from the hardware up to the rack management plane: the root of trust each controller boots from, the signed updates that reach the fleet
About the Software organisation at Fractile Developer Experience sits within the Software organisation at Fractile, which is responsible for developing a full software stack for our groundbreaking AI inference systems. That's everything from ML compilers, device drivers and systems firmware, application level runtime and ecosystem integrations, ML and compute libraries, great developer tooling and a full portfolio of
We are looking for a highly motivated and experienced RTL Design Engineer to join our dynamic team. In this role, you will play a key part in the design and implementation of digital systems, contributing to every stage of the project lifecycle. Your work will involve developing and optimising Register Transfer Level (RTL) designs for high-performance and power-efficient systems RTL Development and Implementation: De
On the device, close to the metal, we write the runtime software that orchestrates work across the chip and runs performance-critical ML kernels. This is where performance gets real and the wins compound. Your work directly influences trade-offs for the silicon, system deployment, and the compiler. You'll drive the first accelerator compute runs, evaluating performance on silicon, running early benchmarks, and feedin
Drive the physical implementation of ASIC/SoC designs, including floorplanning, placement, clock tree synthesis (CTS), routing, and sign-off, with potential responsibility for full-chip execution. Work on synthesis, timing analysis (STA), and optimisation to achieve the best PPA metrics. Perform power planning and analysis, addressing IR drop, electromigration, and low-power design techniques. Ensure design rule chec
About the Software organisation at Fractile Developer Experience sits within the Software organisation at Fractile, which is responsible for developing a full software stack for our groundbreaking AI inference systems. That's everything from ML compilers, device drivers and systems firmware, application level runtime and ecosystem integrations, ML and compute libraries, great developer tooling and a full portfolio of
We are looking for a highly motivated and experienced RTL Design Engineer to join our dynamic team. In this role, you will play a key part in the design and implementation of digital systems, contributing to every stage of the project lifecycle. Your work will involve developing and optimising Register Transfer Level (RTL) designs for high-performance and power-efficient systems RTL Development and Implementation: De
We are looking for an Engineer to play a key role in the development and manufacture of Fractile's silicon products, with a particular focus on product, yield and manufacturing data analysis. Working across New Product Introduction (NPI), Yield Engineering and Product Quality, you will analyse large and complex semiconductor datasets to identify trends, isolate sources of variation, improve yield and reliability, and
About Fractile Fractile was founded in 2022 on the bet that, eventually, the world’s most capable AI systems would be limited in their impact by the time taken to produce useful outputs. We bet everything on the logical conclusion: that the only way to truly unlock this latent value, to make speed viable at scale, was to radically re-invent the hardware that we run our frontier AI models on. Ever since, we have been
Define and own the compute engine architecture specifications, balancing performance, flexibility, power, area, and design complexity. Lead architectural exploration from early concept through to specification, coordinating with modelling, implementation, verification, and physical design teams. Specify execution units, memory hierarchy, instruction sets and flow — making principled trade-offs at every level. Help bu
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